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A Framework for Automatic Synthesis of Neuromorphic Architectures with Heterogeneous Integration of CMOS and Memristors
Conference proceeding

A Framework for Automatic Synthesis of Neuromorphic Architectures with Heterogeneous Integration of CMOS and Memristors

Sarah Johari, Arghavan Mohammadhassani and Anup Das
IEEE International Symposium on Circuits and Systems proceedings, pp 1-5
25 May 2025

Abstract

Application programming interfaces Hardware Neuromorphic Computing Neurons PyTorch Resistive RAM Semiconductor device modeling SPICE Spiking neural networks Synapses Training Transistors

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