Conference proceeding
An ASIC Emulated Oscillator Ising/Potts Machine Solving Combinatorial Optimization Problems
IEEE International Symposium on Circuits and Systems proceedings, pp 4646-4650
24 May 2026
Abstract
Oscillator-based Ising/Potts machines (OIMs/OPMs) are promising hardware accelerators for NP-hard combinatorial optimization problems using coupled oscillator synchronization dynamics. Analog OIMs/OPMs offer speed advantages but have limited coupling resolution, process variation susceptibility, and scalability issues, while digital GPU/CPU emulations provide flexibility but suffer from irregular memory access patterns and energy inefficiency. This work presents a custom ASIC architecture that digitally emulates OIM/OPM dynamics using simplified fixed-point Kuramoto model equations. The scalable design features processing elements with direct interconnections, eliminating shared memory bottleneck while maintaining digital programmability and precision. A 20×20 processing element array with king's graph connectivity is prototyped and evaluated via post-layout simulations on unweighted/weighted max-cut and graph coloring problems, achieving 97-100% maximum accuracy with significant speed and energy improvements over general-purpose platforms, demonstrating the viability of algorithmically codesigned ASICs.
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Details
- Title
- An ASIC Emulated Oscillator Ising/Potts Machine Solving Combinatorial Optimization Problems
- Creators
- Yilmaz Ege Gonul - Drexel UniversityBaris Taskin - Drexel University
- Publication Details
- IEEE International Symposium on Circuits and Systems proceedings, pp 4646-4650
- Publisher
- IEEE
- Resource Type
- Conference proceeding
- Language
- English
- Academic Unit
- Electrical and Computer Engineering
- Other Identifier
- 991022192883904721