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Chip-scale demonstration of 3-D integrated intra-chip free-space optical interconnect
Conference proceeding

Chip-scale demonstration of 3-D integrated intra-chip free-space optical interconnect

Hui Wu, Berkehan Ciftcioglu, Rebecca Berman, Jianyun Hu, Shang Wang, Ioannis Savidis, Manish Jain, Duncan Moore, Michael Huang, Eby G. Friedman, …
OPTOELECTRONIC INTEGRATED CIRCUITS XIV, v 8265
01 Jan 2012

Abstract

Engineering Engineering, Electrical & Electronic Optics Physical Sciences Science & Technology Technology
This paper presents the first chip-scale demonstration of an intra-chip free-space optical interconnect (FSOI) we recently proposed. 1 This interconnect system uses point-to-point free-space optical links to construct an all-to-all intra-chip communication network. Unlike other electrical and waveguide-based optical interconnect systems, FSOI exhibits low latency, high energy efficiency, and large bandwidth density with little degradation for long distance transmission, and hence can significantly improve the performance of future many-core chips. A 1x1-cm(2) chip prototype is fabricated on a germanium substrate with integrated photodetectors. A commercial 850-nm GaAs vertical-cavity-surface-emitting-laser (VCSEL) and fabricated fused silica micro-lenses are 3-D integrated on top of the germanium substrate. At a 1.4-cm distance, the measured optical transmission loss is 5 dB and crosstalk is less than -20 dB. The electrical-to-electrical bandwidth is 3.3 GHz, limited by the VCSEL.

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Web of Science research areas
Engineering, Electrical & Electronic
Optics
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