Conference proceeding
Design of linear array processors with content addressable memory for intermediate level vision
PARALLEL AND DISTRIBUTED COMPUTING SYSTEMS - PROCEEDINGS OF THE ISCA 9TH INTERNATIONAL CONFERENCE, VOLS I AND II, pp.585-588
01 Jan 1996
Abstract
This work presents a new design of parallel architecture for intermediate level vision. Termed LAPCAM (Linear Array Processors with Content-Addressable Memory), this architecture for an n x n image, has n processors and 2 memory planes each of n(2) memory modules. The significance of this architecture is, in particular, that it uses the multi-mode access memory, i.e., RAM mode, normal CAM mode, and interactive CAM mode. Furthermore, it has a special configuration of interconnection network combining a linear structure and a tree structure of switches allowing the reduction of data propagation time to O(log n). Hence, through these features, we demonstrate that the LAPCAM is suitable for intermediate level vision tasks In order to evaluate its performance, we illustrate efficient algorithms to determine labeling, area, perimeter, and histogram of an image. We compare this performance with that of different architectures.
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Details
- Title
- Design of linear array processors with content addressable memory for intermediate level vision
- Creators
- E MozefS WeberJ JaberE Tisserand
- Contributors
- K Yetongnon (Editor)S Hariri (Editor)
- Publication Details
- PARALLEL AND DISTRIBUTED COMPUTING SYSTEMS - PROCEEDINGS OF THE ISCA 9TH INTERNATIONAL CONFERENCE, VOLS I AND II, pp.585-588
- Conference
- PARALLEL AND DISTRIBUTED COMPUTING SYSTEMS - ISCA 9TH INTERNATIONAL CONFERENCE
- Publisher
- International Society Computer S & Their Applications (Isca)
- Number of pages
- 4
- Resource Type
- Conference proceeding
- Language
- English
- Academic Unit
- Electrical and Computer Engineering
- Identifiers
- 991019203687104721
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- Computer Science, Theory & Methods