Conference proceeding
IMPROVING AUTONOMOUS SOFT-ERROR TOLERANCE OF FPGA THROUGH LUT CONFIGURATION BIT MANIPULATION
2013 23RD INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL 2013) PROCEEDINGS, pp 1-8
01 Jan 2013
Abstract
Soft-errors in LUT configuration bits of FPGAs can alter the functionality of an implemented design, rendering it useless, unless re-programmed. This paper proposes a technique to improve autonomous fault-masking capabilities of a design by maximizing the number of zeros or ones in LUTs. The technique utilizes spare resources (XOR gates and carry chain) of FPGA devices to selectively manipulate LUT contents using two operations - LUT restructuring and LUT decomposition. Experiments conducted with a wide set of benchmarks from MCNC, IWLS 2005 and ITC99 benchmark suite on Xilinx Virtex 6 FPGA board demonstrate that the proposed methodology maximizes logic 0/1 of LUTs by an average 20% achieving 80% fault-masking with no area overhead. The fault-rate of the entire design is reduced by 60% on average as compared to the existing techniques. Further, an additional 5% fault-masking can be achieved with a 7% increase in slice usage.
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Details
- Title
- IMPROVING AUTONOMOUS SOFT-ERROR TOLERANCE OF FPGA THROUGH LUT CONFIGURATION BIT MANIPULATION
- Creators
- Anup Das - National University of SingaporeShyamsundar Venkataraman - National University of SingaporeAkash Kumar - National University of Singapore
- Contributors
- JMP Cardoso (Editor)K Morrow (Editor)P C Diniz (Editor)
- Publication Details
- 2013 23RD INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL 2013) PROCEEDINGS, pp 1-8
- Series
- International Conference on Field Programmable and Logic Applications
- Publisher
- IEEE
- Number of pages
- 8
- Resource Type
- Conference proceeding
- Language
- English
- Academic Unit
- Electrical and Computer Engineering
- Web of Science ID
- WOS:000349452600005
- Scopus ID
- 2-s2.0-84898634087
- Other Identifier
- 991019295308004721
InCites Highlights
Data related to this publication, from InCites Benchmarking & Analytics tool:
- Web of Science research areas
- Computer Science, Hardware & Architecture
- Computer Science, Software Engineering