Conference proceeding
Injection locked phase lock loop clock recovery circuit at 1.25 Gb/s
1993 23rd European Microwave Conference, pp 828-828
Sep 1993
Abstract
Future local area distribution networks will require optical interconnects between various processors or video distribution nodes, which operate in excess of gigabit per second (Gb/s) with very low prime power consumption. The practical limitation of the receiver is unavailability of low power consuming clock recovery circuits. To overcome this limitation, we present a new design method for low power consuming optical receiver/clock recovery circuit, by extracting the clock signal from ECL compatible data streams above Gb/s, and regenerating the original data signal.
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Details
- Title
- Injection locked phase lock loop clock recovery circuit at 1.25 Gb/s
- Creators
- J Y Lin - Drexel UniversityX Zhang - Drexel UniversityA S Daryoush - Drexel University
- Publication Details
- 1993 23rd European Microwave Conference, pp 828-828
- Conference
- 1993 23rd European Microwave Conference, 23rd (Madrid, Spain, 06 Sep 1993–10 Sep 1993)
- Publisher
- IEEE
- Number of pages
- 1
- Resource Type
- Conference proceeding
- Language
- English
- Academic Unit
- Electrical and Computer Engineering
- Other Identifier
- 991019196419004721