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Neuromorphic Computing for Graph Analytics
Conference proceeding   Open access

Neuromorphic Computing for Graph Analytics

Anup Das
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, pp 1-7
09 Apr 2025
DOI: https://doi.org/10.1145/3676536.3698024
Featured in Collection :   Research Supported by Drexel Libraries' OA Programs
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https://doi.org/10.1145/3676536.3698024View
Published, Version of Record (VoR)Open Access via Drexel Libraries Read and Publish Program 2025CC BY V4.0,  Open

Abstract

Hardware -- Emerging technologies -- Biology-related information processing -- Neural systems Mathematics of computing -- Discrete mathematics -- Graph theory -- Graph algorithms Mathematics of computing -- Discrete mathematics -- Graph theory -- Paths and connectivity problems
Finding the single-source shortest paths (SSSP) in a weighted graph is a fundamental problem in computer science with many practical applications, including network flow and social network analysis. Unfortunately, fast and efficient SSSP computations still remain a major bottleneck for shared memory systems, even with multiple processing cores. In this work, our aim is to address SSSP and other graph analytics using neuromorphic computing, which is an emerging computing paradigm inspired by the computations in the mammalian brain. In our architecture, nodes of a graph are modeled as integrate-and-fire (IF) neurons, while edges are modeled as synaptic connections. Unlike a conventional neuromorphic system that uses electrical synapses where the synaptic strength of a connection is represented using a weight, we propose a novel approach where the synaptic strength is represented using the speed of propagation of an action potential (spike). Therefore, edge capacities are modeled as axonal delays in our architecture and are modulated by the precise timing of spikes (plasticity). When a spike is injected into a neuron representing the source node, it induces a spike to its neighbors (connected neurons) after a delay, where the delay is proportional to the capacity of the corresponding edge. These neurons in turn induce spikes to their respective neighbors, creating a spiking wavefront that propagates through the architecture. The earliest firing time for each neuron is the total capacity of its shortest path from the source neuron. Additionally, the sequence of neurons (nodes) on the shortest path from the source to a given destination can be obtained by identifying the earliest spiking neighbors with respect to when the spiking wavefront reaches this destination. We call this architecture DELEGATE (neuromorphic computing with DELay-basEd plasticity for Graph AnalyTics and morE) and implement it on QUANTISENC, an open-source and configurable neuromorphic hardware for FPGA platforms. Given that IF neurons in QUANTISENC operate concurrently and independently of each other, the proposed solution presents a natural way to represent and solve graph analytics problems such as SSSP in a completely distributed manner. We evaluate resource, latency, and power overhead of DELEGATE for different graph complexities in terms of the number of nodes and edges.

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