Conference proceeding
Reconfigurable multicore architecture for power flow calculation
2011 North American Power Symposium
Aug 2011
Abstract
This paper investigates the advantages of using multicore architectures, comprising high-performance processors and reconfigurable cores, for sparse Lower-Upper (LU) triangular decomposition, used in power flow calculations and contingency analysis. The proposed architecture combines a general-purpose processor with a custom row-reduction accelerator, sending streams of data to the accelerator through the use of a direct memory access module. The simple accelerator provides a speedup of 1.29X over existing high-performance sparse LU software on power system applications. As architectures with tightly-coupled processor cores and reconfigurable cores start to appear on the market, techniques presented in this paper provide a simple way to improve performance in important computations, such as those needed for power system analysis.
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Details
- Title
- Reconfigurable multicore architecture for power flow calculation
- Creators
- Kevin Cunningham - Electr. & Comput. Eng., Drexel Univ., Philadelphia, PA, USAPrawat Nagvajara - Drexel University, Electrical and Computer EngineeringJeremy Johnson - Comput. Sci., Drexel Univ., Philadelphia, PA, USA
- Publication Details
- 2011 North American Power Symposium
- Publisher
- IEEE
- Resource Type
- Conference proceeding
- Language
- English
- Academic Unit
- Electrical and Computer Engineering; Computer Science
- Scopus ID
- 2-s2.0-80053640679
- Other Identifier
- 991019173521204721