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Representation Learning for Digital Integrated Circuit Design Automation
Conference proceeding

Representation Learning for Digital Integrated Circuit Design Automation

Pratik Shrestha and Ioannis Savidis
Proceedings - IEEE International Conference on Computer Design, pp 867-871
10 Nov 2025
DOI: https://doi.org/10.1109/ICCD65941.2025.00127

Abstract

Accuracy Complexity theory Design automation digital design automation Feature extraction Integrated circuit synthesis Interoperability Representation learning Routing Scalability Timing Machine Learning
Representation learning has become an effective technique utilized by electronic design automation (EDA) algorithms. By addressing challenges related to the increasing complexity of circuits and the corresponding stringent power, performance, and area (PPA) requirements, representation learning facilitates the automatic extraction of meaningful features from complex data formats, including images, grids, and graphs. In this paper, the application of representation learning to digital IC design automation is explored with an analysis of prior work on foundational concepts and case studies on tasks that include timing prediction and routability analysis. Key techniques, including image-based methods, graph-based approaches, and hybrid multimodal solutions, are described that highlight the improvements provided in routing and timing prediction. The provided advancements demonstrate the potential of representation learning to enhance efficiency, accuracy, and scalability in current integrated circuit design flows.

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Web of Science research areas
Computer Science, Hardware & Architecture
Computer Science, Software Engineering
Computer Science, Theory & Methods
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