Conference proceeding
Thermal conduction path analysis in 3-D ICs
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Conference Proceedings, 594
01 Jun 2014
Abstract
Conference Title: 2014 IEEE International Symposium on Circuits and Systems (ISCAS) Conference Start Date: 2014, June 1 Conference End Date: 2014, June 5 Conference Location: Melbourne VIC, Australia The on-going effort of integrating heterogeneous circuits as well as the increasing length of global interconnect are driving the semiconductor community towards 3-D integrated circuits. In this work, thermal paths within a 3-D stack are investigated using the HotSpot simulator, and the results are compared to experimental data of a fabricated two layer stack with a single back metal layer. Resistive heaters and sensors measure the heat flow in both the horizontal and vertical dimensions. The dependence of the thermal conductivity on temperature is integrated into the thermal simulation process. At high temperatures (∼ 80°C), this effect is responsible for inaccuracies in the temperature and thermal resistance of up to, respectively, 20% and 28%. As confirmed by simulation, those horizontal paths that lie mostly within the silicon layer conduct more heat as compared to the vertical paths, since the thermal conductivity of silicon dioxide is ∼ 200 times smaller than the thermal conductivity of silicon. [PUBLICATION ABSTRACT]
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Details
- Title
- Thermal conduction path analysis in 3-D ICs
- Creators
- Boris VaisbandIoannis SavidisEby G Friedman
- Publication Details
- The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Conference Proceedings, 594
- Publisher
- The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
- Resource Type
- Conference proceeding
- Language
- English
- Academic Unit
- Electrical and Computer Engineering
- Identifiers
- 991019170137304721