Conference proceeding
Time Domain Sequential Locking for Increased Security
2018 IEEE International Symposium on Circuits and Systems (ISCAS), v 2018-, pp 1-5
May 2018
Abstract
In this paper, the state space of an integrated circuit (IC) is used to increase the security of an IC against a variety of threats including intellectual property theft, IC counterfeiting, and IC overproduction. Hidden state transitions, state dependent keys, and temporal based transitions are implemented as a means to combat probing style attacks, such as the SAT attack. SPICE simulations are performed on modified state machines to characterize the overhead of implementing the three techniques in a circuit. Implementing temporal based transitions increases the area of the circuit by 68.42%, the power by 43.17%, and did not impact circuit delay. However, increasing the circuit size significantly reduces the overhead of state space encryption. For example, encrypting two registers in the s15850 ISCAS89 benchmark circuit resulted in an area overhead of 0.026%, presenting a low overhead means of securing sequential logic.
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Details
- Title
- Time Domain Sequential Locking for Increased Security
- Creators
- Kyle Juretus - Drexel UniversityIoannis Savidis - Drexel UniversityIEEE
- Publication Details
- 2018 IEEE International Symposium on Circuits and Systems (ISCAS), v 2018-, pp 1-5
- Publisher
- IEEE
- Resource Type
- Conference proceeding
- Language
- English
- Academic Unit
- Electrical and Computer Engineering
- Web of Science ID
- WOS:000451218702097
- Scopus ID
- 2-s2.0-85057132123
- Other Identifier
- 991019169629704721
InCites Highlights
Data related to this publication, from InCites Benchmarking & Analytics tool:
- Web of Science research areas
- Engineering, Electrical & Electronic