Conference proceeding
Transfer Learning of Arrival Time Prediction Models from a 65 nm to a 28 nm Process Node
2024 IEEE 17th Dallas Circuits and Systems Conference (DCAS), pp 1-6
19 Apr 2024
Abstract
The ability to adapt predictive models from an older to a newer technology node provides an efficient means to design, optimization, and analyze a circuit. This paper presents a novel application of transfer learning techniques that adapt arrival time prediction models from a 65 nm technology node to a 28 nm technology node. By leveraging models developed for the 65 nm node, the benefits and challenges of transferring the knowledge gained from the 65 nm node to enhance model performance at the 28 nm node are explored. A dataset that includes six IWLS'05 sequential benchmark circuits is utilized to evaluate the effectiveness of the transfer learning between technology nodes. Models trained on 65 nm data are further tuned on 28 nm data and are compared to both models trained on 28 nm data only and 65 nm models utilized directly without further training. The mean absolute error (MAE) and the mean absolute percentage error (MAPE) are calculated for comparison. The proposed transferred models outperform the 65 nm models utilized directly with no further tuning, providing an average improvement of 38.49% in MAE and 28.16% in MAPE, while requiring 1 hour and 40 minutes to generate the additional data needed for modeling tuning. The models trained directly on 28 nm data outperform the proposed transferred models, with an average improvement of 8.51% in MAE and 20.22% in MAPE. However, the improved performance is at a cost of greater computational resources as 2 hours and 47 minutes are needed to generate the additional data and train the 28 nm models. The results underscore the potential of transfer learning to reduce the time and resources needed to adapt predictive models across fabrication technology nodes.
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Details
- Title
- Transfer Learning of Arrival Time Prediction Models from a 65 nm to a 28 nm Process Node
- Creators
- Pratik Shrestha - Drexel UniversityIoannis Savidis - Drexel University
- Publication Details
- 2024 IEEE 17th Dallas Circuits and Systems Conference (DCAS), pp 1-6
- Publisher
- IEEE
- Resource Type
- Conference proceeding
- Language
- English
- Academic Unit
- Electrical and Computer Engineering; College of Engineering
- Web of Science ID
- WOS:001241292100030
- Scopus ID
- 2-s2.0-85195441672
- Other Identifier
- 991021884114804721
InCites Highlights
Data related to this publication, from InCites Benchmarking & Analytics tool:
- Web of Science research areas
- Computer Science, Artificial Intelligence
- Computer Science, Hardware & Architecture
- Engineering, Electrical & Electronic