Conference proceeding
Transistor Sizing for Parameter Obfuscation of Analog Circuits Using Satisfiability Modulo Theory
2018 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2018)
01 Jan 2018
Abstract
In this paper, an approach is described for enhancing the security of analog circuits using Satisfiability Modulo Theory (SMT) based design space exploration. The technique takes as inputs generic circuit equations and performance constraints and, by exhaustively exploring the design space, outputs transistor sizes that satisfy the given constraints. The analog satisfiability (aSAT) methodology is applied to parameter biasing obfuscation, where the width of a transistor is obfuscated to mask circuit properties, while also limiting the number of keys that produce the target performance requirements. The proposed methodology is used in the design of a differential amplifier and a two stage amplifier. The widths determined through aSAT analysis are shown to meet the gain, phase margin, and power consumption requirements for both a differential amplifier and a two-stage amplifier. However, a 7 MHz offset in the gain-bandwidth of the two-stage amplifier is observed from the target value of 30 MHz. The total gain of the two stage amplifier is masked with a 24 bit encryption key that results in a probability of 5.96x10- 8 to determine the correct key. The simulated results indicate that the proposed analog design methodology quickly and accurately determines transistor sizes for target specifications, while also accounting for obfuscation of analog circuit parameters.
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Details
- Title
- Transistor Sizing for Parameter Obfuscation of Analog Circuits Using Satisfiability Modulo Theory
- Creators
- Vaibhav Venugopal Rao - Drexel Univ, Dept Elect & Comp Engn, Philadelphia, PA 19104 USAIoannis Savidis - Drexel UniversityIEEE
- Publication Details
- 2018 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2018)
- Publisher
- IEEE
- Number of pages
- 5
- Grant note
- Drexel Ventures Innovation Funds CNS-1648878; CNS-1751032 / National Science Foundation; National Science Foundation (NSF)
- Resource Type
- Conference proceeding
- Language
- English
- Academic Unit
- Electrical and Computer Engineering
- Web of Science ID
- WOS:000458319800026
- Scopus ID
- 2-s2.0-85062237474
- Other Identifier
- 991019170591704721
InCites Highlights
Data related to this publication, from InCites Benchmarking & Analytics tool:
- Web of Science research areas
- Engineering, Electrical & Electronic