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A high speed VLSI architecture for the discrete Haar wavelet transform
Thesis   Open access

A high speed VLSI architecture for the discrete Haar wavelet transform

Peter Edward Becker
Master of Science (M.S.), Drexel University
2001
DOI:
https://doi.org/10.17918/00008216
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Abstract

Electrical engineering Very high speed integrated circuits
An alternative to strictly time- or frequency-domain analysis, wavelets provide a multiresolution analysis of signals for input to processing such as edge detection, compression, and pattern recognition. High speed VLSI architectures are necessary for real-time processing of large data sets. Presented here is such an architecture for the Haar wavelet transform, the simplest and easiest wavelet to understand. From this base model, a generalization of the architecture to other wavelets is discussed, as well.

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