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Effects of novel non-uniform and wireless interconnects on uniform multi-die systems
Thesis   Open access

Effects of novel non-uniform and wireless interconnects on uniform multi-die systems

Angela Wei
Master of Science (M.S.), Drexel University
Jun 2021
DOI:
https://doi.org/10.17918/00000782
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Abstract

Interconnects (Integrated circuit technology)
Demand for high performance computing has led to an increased number of on-chip processing elements (PEs) and an overall increase to the total area of chips. This physical growth is accompanied by an increase in packet travel distance leading to a deterioration in average latency and throughput of the system. Network-on-Chip (NoC) architectures have become the favored framework for these large scale processors. Advances in multi-core processor and interconnect technologies have pushed multi-die 3D NoC architectures, whereby 3D chiplets are arranged on an active silicon interposer, to the forefront, ahead of current monolithic architectures. Additionally, on-chip wireless interconnects offer enhanced network performance due to improved long distance communication, additional bandwidth, and broadcasting capabilities of antennas. This thesis investigates the possibility of improving the latency and throughput of interconnect framework of multi-die systems utilizing novel non-uniform topologies and innovative wireless interconnects. System-level simulations for these novel typologies and monolithic architectures are performed and the results for the metrics of latency, throughput, energy and energy-delay product are compared to evaluate performance.

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