Thesis
Implementation of video processing techniques on a field programmable gate array development platform
Master of Science (M.S.), Drexel University
Jun 2015
DOI:
https://doi.org/10.17918/etd-6701
Abstract
The thesis covers detailed description of a development platform for video processing system targeted for ON-camera applications. Platforms such as the Zynq and Xilinx Inc., integrate high-performance processing, programmable digital intellectual property (IP), core peripheral, and input-output video signal interfaces into a single FPGA chip. The advantages of using this method include size, weight, and power (SWAP) requirements in applications such as pilot helmet vision and binocular video processors. The contents include an overview of the processor system and IP cores on the FPGA architecture, video processing IP cores, Integrated Design Environment (IDE) tools, and case studies on grey scale conversion and canny edge detection. The results from the case studies display the effectiveness of the design and implementation methodology. Programmable IP core peripherals enable real-time processing, which is difficult to meet under SWAP constraints using software alone. The thesis presents studies on the design and implementation methodology and FPGA video processor platform.
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Details
- Title
- Implementation of video processing techniques on a field programmable gate array development platform
- Creators
- Michael Thomas Amoruso Jr. - DU
- Contributors
- Prawat Nagvajara (Advisor) - Drexel University (1970-)
- Awarding Institution
- Drexel University
- Degree Awarded
- Master of Science (M.S.)
- Publisher
- Drexel University; Philadelphia, Pennsylvania
- Number of pages
- vi, 36 pages
- Resource Type
- Thesis
- Language
- English
- Academic Unit
- College of Engineering (1970-2026); Electrical (and Computer) Engineering (1970-2026); Drexel University
- Other Identifier
- 6701; 991014632564704721