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Implementation of video processing techniques on a field programmable gate array development platform
Thesis   Open access

Implementation of video processing techniques on a field programmable gate array development platform

Michael Thomas Amoruso Jr.
Master of Science (M.S.), Drexel University
Jun 2015
DOI:
https://doi.org/10.17918/etd-6701
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Abstract

Electrical engineering Field programmable gate arrays Video recordings--Production and direction
The thesis covers detailed description of a development platform for video processing system targeted for ON-camera applications. Platforms such as the Zynq and Xilinx Inc., integrate high-performance processing, programmable digital intellectual property (IP), core peripheral, and input-output video signal interfaces into a single FPGA chip. The advantages of using this method include size, weight, and power (SWAP) requirements in applications such as pilot helmet vision and binocular video processors. The contents include an overview of the processor system and IP cores on the FPGA architecture, video processing IP cores, Integrated Design Environment (IDE) tools, and case studies on grey scale conversion and canny edge detection. The results from the case studies display the effectiveness of the design and implementation methodology. Programmable IP core peripherals enable real-time processing, which is difficult to meet under SWAP constraints using software alone. The thesis presents studies on the design and implementation methodology and FPGA video processor platform.

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