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Built-In Functional Testing of Analog In-Memory Accelerators for Deep Neural Networks
Journal article   Open access   Peer reviewed

Built-In Functional Testing of Analog In-Memory Accelerators for Deep Neural Networks

Abhishek Kumar Mishra , Anup Kumar Das and Nagarajan Kandasamy
Electronics (Basel), v 11(2592), p2592
01 Aug 2022
url
https://doi.org/10.3390/electronics11162592View
Published, Version of Record (VoR)CC BY V4.0 Open

Abstract

deep neural networks functional testing in-memory computing non-volatile memory pseudorandom testing
The paper develops a methodology for the online built-in self-testing of deep neural network (DNN) accelerators to validate the correct operation with respect to their functional specifications. The DNN of interest is realized in the hardware to perform in-memory computing using non-volatile memory cells as computational units. Assuming a functional fault model, we develop methods to generate pseudorandom and structured test patterns to detect hardware faults. We also develop a test-sequencing strategy that combines these different classes of tests to achieve high fault coverage. The testing methodology is applied to a broad class of DNNs trained to classify images from the MNIST, Fashion-MNIST, and CIFAR-10 datasets. The goal is to expose hardware faults which may lead to the incorrect classification of images. We achieve an average fault coverage of 94% for these different architectures, some of which are large and complex.

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5 citations in Scopus

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Web of Science research areas
Computer Science, Information Systems
Engineering, Electrical & Electronic
Physics, Applied
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