Journal article
Hidden Costs of Analog Deobfuscation Attacks
IEEE transactions on very large scale integration (VLSI) systems, pp 1-0
19 Sep 2023
Abstract
Analog obfuscation techniques to prevent intellectual property attacks have mainly evolved from digital obfuscation. Similar to digital hardware security, the considered threat models commonly assume that the attacker possesses the circuit netlist, specifications, and bias information to deobfuscate a locked analog circuit. However, when one or more pieces of information remain unavailable, there is an adverse effect on the performance of current analog attack algorithms. In this article, an analysis of the challenges and limitations of obtaining the information needed to successfully attack an analog circuit is provided. In addition, the performance of current state-of-the-art analog attack techniques is evaluated when one or more pieces of information is unavailable. The analysis of the attack on five distinct analog circuits obfuscated with key-based parameter locking is performed, premised upon the level of information possessed by the adversary. The monotonic attack (MA) returned the correct key in less than 10 h when executing a black-box attack on single stage circuits obfuscated with a 10-bit key. The key-spacing (KS) attack is 10 \times faster than the monotonic attack and returns 8.3 \times fewer candidate keys for multistage analog circuits. The satisfiability modulo theory (SMT) based attack is 224 \times slower than the monotonic attack and 2240 \times slower than the key spacing attack for an 18-bit obfuscated circuit. A genetic algorithm (GA) based attack is 121 091 \times slower than an monotonic attack even for a single stage analog circuit. Through analysis of the results, metrics are developed to characterize the setup and evaluation time of executing the deobfuscation attacks.
Metrics
Details
- Title
- Hidden Costs of Analog Deobfuscation Attacks
- Creators
- Vaibhav Venugopal Rao - Drexel UniversityKyle Juretus - Villanova UniversityIoannis Savidis - Drexel University
- Publication Details
- IEEE transactions on very large scale integration (VLSI) systems, pp 1-0
- Publisher
- IEEE
- Grant note
- CNS-1751032 / National Science Foundation (10.13039/100000001) Drexel Ventures Innovation Fund
- Resource Type
- Journal article
- Language
- English
- Academic Unit
- Electrical and Computer Engineering
- Web of Science ID
- WOS:001071911000001
- Scopus ID
- 2-s2.0-85175398752
- Other Identifier
- 991021229979804721
InCites Highlights
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- Collaboration types
- Domestic collaboration
- Web of Science research areas
- Computer Science, Hardware & Architecture
- Engineering, Electrical & Electronic