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Implementation of front-end processor neural networks
Journal article   Peer reviewed

Implementation of front-end processor neural networks

Bahram Nabet, Robert B. Darling and Robert B. Pinter
Neural networks, v 5(6), pp 891-902
1992
DOI: https://doi.org/10.1016/S0893-6080(05)80085-1

Abstract

Analog implementation Front-end processing Mean intensity adaptation Multiplicative lateral inhibition Shunting neural networks
Electronic implementation of a class of neural networks whose short-term memory equation is governed by multiplicative, rather than additive, inhibition is proposed. The network models can be derived from ionic flow in nerve membranes and multiplicative terms result from control of conductive paths by voltages of other cells in the network. Since Field Effect Transistors (FETs) are voltage controlled conductances when operated below pinch-off, these networks can be readily implemented in FET technology using this physical property. This class of neural networks appears in many areas of the brain as well as the sensory system and has been used as a basic building block for the multilayer self-organizing architecture of Adaptive Resonance Theory (ART). The model has been especially useful for explaining a wide range of peripheral visual phenomena. The implementation is intended to specifically demonstrate desirable front-end image processing properties of contrast enhancement, edge detection, dynamic range compression, and adaptation of dynamics to mean intensity levels. Since the network can be mathematically described, its dynamics and stability may be examined. Compatibility of the network with higher level processing allows for its inclusion in multilayer self-organizing neural network architectures.

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10 citations in Web of Science
11 citations in Scopus

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Collaboration types
Domestic collaboration
Web of Science research areas
Computer Science, Artificial Intelligence
Neurosciences
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