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Mapping Spiking Neural Networks to Neuromorphic Hardware
Journal article   Open access   Peer reviewed

Mapping Spiking Neural Networks to Neuromorphic Hardware

Adarsha Balaji, Francky Catthoor, Anup Das, Yuefeng Wu, Khanh Huynh, Francesco G Dell'Anna, Giacomo Indiveri, Jeffrey L Krichmar, Nikil D Dutt and Siebren Schaafsma
IEEE transactions on very large scale integration (VLSI) systems, v 28(1), pp 76-86
Jan 2020
url
https://doi.org/10.1109/tvlsi.2019.2951493View
Accepted (AM)Open Access (Publisher-Specific) Open

Abstract

Design methodology Distortion Energy consumption Hardware Interspike interval (ISI) neuromorphic computing Neuromorphics Neurons spiking neural network (SNN) Synapses
Neuromorphic hardware implements biological neurons and synapses to execute a spiking neural network (SNN)-based machine learning. We present SpiNeMap, a design methodology to map SNNs to crossbar-based neuromorphic hardware, minimizing spike latency and energy consumption. SpiNeMap operates in two steps: SpiNeCluster and SpiNePlacer. SpiNeCluster is a heuristic-based clustering technique to partition an SNN into clusters of synapses, where intracluster local synapses are mapped within crossbars of the hardware and intercluster global synapses are mapped to the shared interconnect. SpiNeCluster minimizes the number of spikes on global synapses, which reduces spike congestion and improves application performance. SpiNePlacer then finds the best placement of local and global synapses on the hardware using a metaheuristic-based approach to minimize energy consumption and spike latency. We evaluate SpiNeMap using synthetic and realistic SNNs on a state-of-the-art neuromorphic hardware. We show that SpiNeMap reduces average energy consumption by 45% and spike latency by 21%, compared to the best-performing SNN mapping technique.

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Collaboration types
Domestic collaboration
International collaboration
Web of Science research areas
Computer Science, Hardware & Architecture
Engineering, Electrical & Electronic
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