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Mapping and scheduling spiking neural networks on segmented ladder bus architectures
Journal article   Open access   Peer reviewed

Mapping and scheduling spiking neural networks on segmented ladder bus architectures

Phu Khanh Huynh, Francky Catthoor and Anup Das
Journal of systems architecture, v 169, 103590
Dec 2025
DOI: https://doi.org/10.1016/j.sysarc.2025.103590
url
https://arxiv.org/pdf/2506.11286View
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Abstract

Segmented bus Ladder bus Neuromorphic computing Spiking neural networks Optimization
Large-scale neuromorphic architectures consist of computing tiles that communicate spikes using a shared interconnect. The communication patterns in such systems are inherently sparse, asynchronous, and localized due to the spiking nature of neural events, characterized by temporal sparsity with occasional bursts of traffic. These characteristics necessitate interconnects optimized for handling high-activity bursts while consuming minimal power during idle periods. Dynamic segmented bus has been proposed a promising interconnect for its simplicity, scalability and low power consumption. However, deploying spiking neural network applications on such buses presents challenges, including substantial inter-cluster traffic, which can lead to network congestion, spike loss, and unnecessary energy expenditure. In this paper, we propose a three-step process to deploy SNN applications on dynamic segmented buses aiming to reduce spike loss and conserve energy. Firstly, we formulate optimization heuristics to mitigate spike loss and energy consumption based on application connectivity. Secondly, we analyze the application traffic to determine spike schedules that minimize traffic flooding. Lastly, we propose a routing algorithm to minimize spike traffic path crossings. We evaluate our approach using a cycle-accurate network simulator. The simulation results show that our algorithms can eliminate spike loss while keeping energy consumption significantly lower compared to conventional NoCs.

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Domestic collaboration
International collaboration
Web of Science research areas
Computer Science, Hardware & Architecture
Computer Science, Software Engineering
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