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Models of a computer architecture for processing of large numbers of images
Journal article   Peer reviewed

Models of a computer architecture for processing of large numbers of images

Constantine Katsinis
Computers & electrical engineering, v 15(1), pp 11-18
1989

Abstract

In this paper we present statistical models, simulation results and two implementations of a multicomputer system particularly suited for processing large numbers of images and other applications involving a set of operations to be performed on a stream of data blocks. This system consists of N satellite computers and M central computers interconnected by M buses such that any satellite can communicate with any central computer. Data blocks are transferred by the central computers to the satellites where they are processed. The system performance measures are the satellite idle time and the increase in processing speed over a single computer system. We develop two models of system operation from which the idle time can be related to the statistical properties of the transfer and processing times.

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Web of Science research areas
Computer Science, Hardware & Architecture
Computer Science, Interdisciplinary Applications
Engineering, Electrical & Electronic
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