Journal article
Optimal robust compression of test responses
IEEE transactions on computers, v 39(1), pp 138-141
Jan 1990
Abstract
A compression of test responses technique for a built-in self-test (BIST) VLSI design is presented. The authors introduce the notion of a robust compression technique which incorporates prior knowledge of the statistics of fault-free responses under pseudorandom testing to achieve a guaranteed error detectability independent of a distribution of errors. The presented robust quadratic compressor requires two r-bit registers (r-bit signature) more than a multiple-input linear feedback shift register; however, it provides for equal protection against all error patterns. Therefore, quadratic compressors are optimal and robust with respect to a statistics of errors in a device under test.< >
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Details
- Title
- Optimal robust compression of test responses
- Creators
- M.G. Karpovsky - Boston UniversityP. Nagvajara - Boston University
- Publication Details
- IEEE transactions on computers, v 39(1), pp 138-141
- Publisher
- IEEE
- Number of pages
- 4
- Resource Type
- Journal article
- Language
- English
- Academic Unit
- Electrical and Computer Engineering
- Web of Science ID
- WOS:A1990CG61900015
- Scopus ID
- 2-s2.0-0025252881
- Other Identifier
- 991021944822804721
InCites Highlights
Data related to this publication, from InCites Benchmarking & Analytics tool:
- Web of Science research areas
- Computer Science, Hardware & Architecture
- Engineering, Electrical & Electronic