Journal article
SLECTS: Slew-Driven Clock Tree Synthesis
IEEE transactions on very large scale integration (VLSI) systems, v 27(4), pp 864-874
Apr 2019
Abstract
A slew-driven clock tree synthesis (SLECTS) methodology is proposed for nanoscale technologies where the interconnect resistance dominates device resistance, thereby increasing the challenge of satisfying the slew constraint. This issue is exacerbated at lower voltages due to degraded drive ability of the clock buffers. A paradigm shift from the traditional delay (and skew)-driven approaches to the proposed slew-driven methodology is therefore required. SLECTS is developed in this paper to satisfy tight slew constraints, which can be costly or infeasible with delay (skew)-driven methodologies and reduce the power dissipation of the clock tree, since the slew and skew constraints are simultaneously and methodically considered. Experimental results performed on an industrial circuit with more than 1M gates designed in 28-nm technology demonstrate that clock power is reduced by approximately 15% as compared to a commercial clock tree synthesis tool under similar slew and skew constraints.
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Details
- Title
- SLECTS: Slew-Driven Clock Tree Synthesis
- Creators
- Weicheng Liu - Stony Brook UniversityCan Sitik - Drexel UniversityEmre Salman - Stony Brook UniversityBaris Taskin - Drexel UniversitySavithri Sundareswaran - NXPBenjamin Huang - NXP
- Publication Details
- IEEE transactions on very large scale integration (VLSI) systems, v 27(4), pp 864-874
- Publisher
- IEEE
- Grant note
- 2013-TJ-2449; 2013-TJ-2450 / Semiconductor Research Corporation (10.13039/100000028)
- Resource Type
- Journal article
- Language
- English
- Academic Unit
- Electrical and Computer Engineering
- Web of Science ID
- WOS:000462444000012
- Scopus ID
- 2-s2.0-85063370368
- Other Identifier
- 991019168880304721
InCites Highlights
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- Collaboration types
- Industry collaboration
- Domestic collaboration
- Web of Science research areas
- Computer Science, Hardware & Architecture
- Engineering, Electrical & Electronic