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TSV-W for 2.5-D IC Wireless Interconnects
Journal article   Peer reviewed

TSV-W for 2.5-D IC Wireless Interconnects

Kyei Anim, Baris Taskin, Amlan Ganguly and Kapil R. Dandekar
IEEE transactions on very large scale integration (VLSI) systems, v 34(10), pp 1-11
2026
DOI: https://doi.org/10.1109/TVLSI.2026.3716542

Abstract

2.5-D integrated circuit (IC) antenna design Arrays Design methodology Distance measurement finite element method (FEM) simulations Joining processes Modeling Radio frequency Switches Through-silicon vias Very large scale integration wireless interconnects wireless networks on chip Integrated Circuits
This article introduces the use of through silicon vias (TSVs) connected to electrical switches as waveguides for wireless interconnects on 2.5-D interposer-based integrated circuits (ICs). The resulting wireless interconnect can be controlled at run-time with electrical switches on the TSVs forming the TSV-W(aveguide) (TSV-W). This run-time control allows for creating or blocking wireless interconnects based on the demands of the applications mapped to a multicore computing system. The 3-D finite element method (FEM) simulations of 2.5-D IC floorplans are utilized to demonstrate the utility of TSV-Ws when deployed with wireless interconnects built with TSV-A(ntenna)s (TSV-As). The wireless channel between two TSV-As at a communication distance of 15 mm, representative of distant cores on a 6×6 multicore 2.5-D system, is improved from a 3.6-dB loss without proposed TSV-Ws to a stronger link with only a 2.6-dB loss with TSV-Ws ( 3.125× improvement in bandwidth at −10 dB), primarily due to the directionality imposed by TSV-Ws. Also shown in FEM simulations is a configuration of an orthogonally bent wireless channel on a multicore 2.5-D IC system.

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