Logo image
Back
The Accelerator Store: A Shared Memory Framework For Accelerator-Based Systems
Journal article   Open access   Peer reviewed

The Accelerator Store: A Shared Memory Framework For Accelerator-Based Systems

Michael J. Lyons, Mark Hempstead, Gu-Yeon Wei and David Brooks
ACM transactions on architecture and code optimization, v 8(4), pp 1-22
01 Jan 2012
DOI: https://doi.org/10.1145/2086696.2086727
url
https://doi.org/10.1145/2086696.2086727View
Published, Version of Record (VoR)Maybe Open Access (Publisher Bronze),  Open

Abstract

Computer Science Computer Science, Hardware & Architecture Computer Science, Theory & Methods Science & Technology Technology
This paper presents the many-accelerator architecture, a design approach combining the scalability of homogeneous multi-core architectures and system-on-chip's high performance and power-efficient hardware accelerators. In preparation for systems containing tens or hundreds of accelerators, we characterize a diverse pool of accelerators and find each contains significant amounts of SRAM memory (up to 90% of their area). We take advantage of this discovery and introduce the accelerator store, a scalable architectural component to minimize accelerator area by sharing its memories between accelerators. We evaluate the accelerator store for two applications and find significant system area reductions (30%) in exchange for small overheads (2% performance, 0%-8% energy). The paper also identifies new research directions enabled by the accelerator store and the many-accelerator architecture.

Metrics

18 Record Views
39 citations in Web of Science
64 citations in Scopus

Details

InCites Highlights

Data related to this publication, from InCites Benchmarking & Analytics tool:

Collaboration types
Domestic collaboration
Web of Science research areas
Computer Science, Hardware & Architecture
Computer Science, Theory & Methods
Logo image