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An ASIC Emulated Oscillator Ising/Potts Machine Solving Combinatorial Optimization Problems
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An ASIC Emulated Oscillator Ising/Potts Machine Solving Combinatorial Optimization Problems

Yilmaz Ege Gonul and Baris Taskin
ArXiv.org
15 Apr 2026
DOI: https://doi.org/10.48550/arxiv.2604.14027
url
https://doi.org/10.48550/arXiv.2604.14027View
Preprint (Author's original) Open arXiv.org - Non-exclusive license to distribute

Abstract

Computer Science - Emerging Technologies Computer Science - Hardware Architecture
Oscillator-based Ising/Potts machines (OIMs/OPMs) are promising hardware accelerators for NP-hard combinatorial optimization problems using coupled oscillator synchronization dynamics. Analog OIMs/OPMs offer speed advantages but have limited coupling resolution, process variation susceptibility, and scalability issues, while digital GPU/CPU emulations provide flexibility but suffer from irregular memory access patterns and energy inefficiency. This work presents a custom ASIC architecture that digitally emulates OIM/OPM dynamics using simplified fixedpoint Kuramoto model equations. The scalable design features processing elements with direct interconnections, eliminating shared memory bottleneck while maintaining digital programmability and precision. A 20x20 processing element array with king's graph connectivity is prototyped and evaluated via post-layout simulations on unweighted/weighted max-cut and graph coloring problems, achieving 97-100% maximum accuracy with significant speed and energy improvements over general-purpose platforms, demonstrating the viability of algorithmically codesigned ASICs.

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